Wednesday, October 24, 2007

7bit UART TX Transmitter

module uart_tx (output sd, output busy, input [6:0] data, input wr, rst, clk);
reg [3:0] state, next_state;
reg [9:0] shifter;

parameter S_IDLE = 4'd0, S_BIT_START = 4'd1, S_BIT_P = 4'd9, S_BIT_STOP = 4'd10;

// continuous assignments
assign busy = (state != S_IDLE);
assign sd = shifter[0];

// synchronous behavior(s)
always @ (posedge clk) begin
if(rst) begin
state <= S_IDLE;
shifter <= 10'b11_1111_1111;
end
else begin
state <= next_state; // update state
if(wr) // load new frame
shifter <= {1'b1, ~(^(data)), data, 1'b0}; // could leave stop bit off!
else // shift current frame
shifter <= {1'b1, shifter[9:1]}; // shift in idle channel
end
end
// next state logic
always @ (state, wr) begin
case (state)
S_IDLE:
if(wr) next_state = S_BIT_START;
else next_state = S_IDLE;
S_BIT_STOP:
next_state = S_IDLE;
default:
next_state = state + 4'd1;
endcase
end

endmodule

16bit BCD adder

sometimes you just want a BCD adder instead of a binary adder. here is a 16bit one that works.

//put the cla and #1 adders together to make them easier to merge
module bcdadd4(
output co,
output [15:0] s,
input [15:0] a,b,
input cin);
wire p_up,g_up;
wire [3:0] p,g;
wire [3:0] carry;

pfa_bcd add[3:0](.p(p),.g(g),.s(s),.a(a),.b(b),.cin({carry[2:0], cin}));

cla localcla(.p_up(p_up),.g_up(g_up),.cout(carry),.p(p),.g(g),.cin(cin));

assign co = carry[3];
endmodule


module pfa_bcd(output reg p, g, output reg[3:0] s, input cin, input[3:0] a, b);
always @(*) begin
s <= (a+b+cin) % 10;
p <= (a+b == 9);
g <= (a+b > 9);
end
endmodule

16bit register file: 2 read & 2 write ports

This is a beautiful piece of code :-)
module reg_file(output [15:0] read1data, read2data, input [15:0] write1data, write2data, input [2:0] read1regsel, read2regsel, write1regsel, write2regsel, input clk, rst, write1, write2);
wire [7:0] reg_final_write, reg1_write, reg2_write;
wire [127:0] write_final_data;
wire [127:0] regfileout;
mux16b_8_1 muxAB [1:0] ({read1data, read2data}, {read1regsel, read2regsel}, {regfileout, regfileout}); //select 2 registers to read

decoder_3_to_8 decoder(reg1_write, write1regsel, write1); //select which register to write to
decoder_3_to_8 decoder2(reg2_write, write2regsel, write2); //select which register to write to
mux16b_2_1 writeportselector [7:0] (write_final_data, reg2_write, write1data, write2data);

assign reg_final_write = reg1_write | reg2_write;

reg16bit reg_16wide [7:0] (regfileout, write_final_data, clk, rst, reg_final_write); //registers
endmodule

//sel = 0 out = a
module mux16b_2_1(output [15:0] out, input sel, input [15:0] a, b);
assign out = (sel) ? b : a;
endmodule

module mux16b_8_1(output [15:0] out, input [2:0] sel, input [127:0] in);
assign out =
(sel == 3'b000) ? in[15:0]:
(sel == 3'b001) ? in[31:16]:
(sel == 3'b010) ? in[47:32]:
(sel == 3'b011) ? in[63:48]:
(sel == 3'b100) ? in[79:64]:
(sel == 3'b101) ? in[95:80]:
(sel == 3'b110) ? in[111:96]: in[127:112];
endmodule

module decoder_3_to_8(output [7:0] out, input [2:0] in, input en);
assign out =(en == 1'b0) ? 8'd0:
(in == 3'b000) ? 8'd1:
(in == 3'b001) ? 8'd2:
(in == 3'b010) ? 8'd4:
(in == 3'b011) ? 8'd8:
(in == 3'b100) ? 8'd16:
(in == 3'b101) ? 8'd32:
(in == 3'b110) ? 8'd64: 8'd128;
endmodule

module reg16bit(output [15:0] dataout, input [15:0] datain, input clk, rst, en);
wire [15:0] regin;
assign regin = en ? datain: dataout;
dff dff_array [15:0](dataout, regin, clk, rst);
endmodule

16bit comparer from 2bit comparer-s

Here is a cool idea, you can string a 2 bit comparer's together to make a big one... purely academic :-)
module compare_2bit(output A_eq_B, A_lt_B, A_gt_B, input [1:0] A, B, input A_eq_B_in, A_lt_B_in, A_gt_B_in);

assign A_eq_B = (A == B) & A_eq_B_in;
assign A_gt_B = (A==B) ? A_gt_B_in : A > B;
assign A_lt_B = (A==B) ? A_lt_B_in : (A < B);

endmodule

module compare_16bit(output X_eq_Y, X_lt_Y, X_gt_Y, input [15:0] X, Y);

wire[7:0] eq, lt, gt;
compare_2bit cp [7:0] (eq, lt, gt, X, Y, {eq[6:0],1'b1}, {lt[6:0],1'b0}, {gt[6:0],1'b0});

assign X_eq_Y = eq[7];
assign X_lt_Y = lt[7];
assign X_gt_Y = gt[7];

endmodule

Webbased Server monitoring Munin


Munin An easy way to keep track of how your servers are doing from a web front. Really clean install, and works on multitudes of servers at once.
How to set it up: How to set up Munin

Tuesday, September 25, 2007

Must Have Tools for Windows XP

CmdHere Power Toy
Allows you to right click anywhere in Windows Explore and open a cmd prompt at that location

Google Desktop
Actually enables you to find your documents

Ruby
Programmers swiss army knife (made in Japan)

Tortoise SVN
life without source control is just dangerous

Trillian
Stay connected with people

UltraMon
You always need more then one monitor, ultramon makes multi-monitors a joy

Putty
What can you do without SSH

WinSCP
Windows Explorer over SSH (just handy)

ModelSim is exiting with code 211.



ModelSim PE can crash on simulation for a 211 error. This error is a license error, caused by ModelSim trying to use some feature that shouldn't work on the Personal Edition.
Solution: Use ModelSim SE

Verilog 3 to 8 decoder and 1 to 8 demux RTL


module decoder3_8(
output [7:0] out,
input [2:0] sel);

assign out = ( sel == 3'b000) ? 8'b1111_1110 :
( sel == 3'b001) ? 8'b1111_1101 :
( sel == 3'b010) ? 8'b1111_1011 :
( sel == 3'b011) ? 8'b1111_0111 :
( sel == 3'b100) ? 8'b1110_1111 :
( sel == 3'b101) ? 8'b1101_1111 :
( sel == 3'b110) ? 8'b1011_1111 :
( sel == 3'b111) ? 8'b0111_1111 :
8'b1111_1111;
endmodule

module demux1_8 (
output[7:0] sig_out,
input[2:0] sel,
input sig_in);

wire[7:0] selout;

decoder3_8 selector(selout, sel);

or finalor[7:0](sig_out, selout, sig_in);

endmodule

Structural 16bit CLA adder in Verilog

A whole 16 bit adder

module pfa(
output p, g, s,
input a, b, cin);
xor #1 sumer(s, a, b, cin);
xor #1 proper(p, a, b);
and #1 gener(g, a, b);
endmodule

//cla module 4 bit
module cla(
output p_up, g_up,
output [3:0] cout, // assumed [3:1] was typo becuase it made design less elegant
input [3:0] p, g,
input cin);

//assign p_up = &(p);
and #1 (p_up, p);
wire p3g2, p3p2g1, p3p2p1g0, p3p2p1p0cin;

and #1(p3g2,p[3],g[2]);
and #1(p3p2g1,p[3],p[2],g[1]);
and #1(p3p2p1g0,p[3],p[2],p[1],g[0]);

and #1(p3p2p1p0cin,p[3],p[2],p[1],p[0],cin);

//assign g_up = g[3] | p[3]&g[2] | p[3]&p[2]&g[1] | p[3]&p[2]&p[1]&g[0];
or #1 (g_up,g[3],p3g2,p3p2g1,p3p2p1g0);

//assign cout[3] = g[3] | p[3]&g[2] | p[3]&p[2]&g[1] | p[3]&p[2]&p[1]&g[0] | p[3]&p[2]&p[1]&p[0]&cin;
or #1(cout[3],g[3],p3g2,p3p2g1,p3p2p1g0,p3p2p1p0cin);

wire p2g1,p2p1g0,p2p1p0cin,p1g0,p1p0cin,p0cin;

and #1(p2g1,p[2],g[1]);
and #1(p2p1g0,p[2],p[1],g[0]);
and #1(p2p1p0cin,p[2],p[1],p[0],cin);
and #1(p1g0,p[1],g[0]);
and #1(p1p0cin,p[1],p[0],cin);
and #1(p0cin,p[0],cin);

//assign cout[2] = g[2] | p[2]&g[1] | p[2]&p[1]&g[0] | p[2]&p[1]&p[0]&cin;
or #1(cout[2], g[2],p2g1,p2p1g0,p2p1p0cin);

//assign cout[1] = g[1] | p[1]&g[0] | p[1]&p[0]&cin;
or #1(cout[1],g[1],p1g0,p1p0cin);

//assign cout[0] = g[0] | p[0]&cin;
or #1(cout[0],g[0],p0cin);
endmodule

//put the cla and #1 adders together to make them easier to merge
module adder4_cla(
output co,
output [3:0] s,
output p_up,g_up,
input [3:0] a,b,
input cin);

wire [3:0] p,g;
wire [3:0] carry;

pfa add[3:0](.p(p),.g(g),.s(s),.a(a),.b(b),.cin({carry[2:0], cin}));

cla localcla(.p_up(p_up),.g_up(g_up),.cout(carry),.p(p),.g(g),.cin(cin));

assign co = carry[3];
endmodule

module add16(
output co,
output [15:0] s,
input [15:0] a,b,
input cin);

wire [3:0] carry, p, g;
wire p_up, g_up;

wire c1,c2,c3,c4;

adder4_cla add1 (.co(c1),.s(s[3:0]),.p_up(p[0]),.g_up(g[0]),.a(a[3:0]),.b(b[3:0]),.cin(cin));
adder4_cla add2 (.co(c2),.s(s[7:4]),.p_up(p[1]),.g_up(g[1]),.a(a[7:4]),.b(b[7:4]),.cin(carry[0]));
adder4_cla add3 (.co(c3),.s(s[11:8]),.p_up(p[2]),.g_up(g[2]),.a(a[11:8]),.b(b[11:8]),.cin(carry[1]));
adder4_cla add4 (.co(c4),.s(s[15:12]),.p_up(p[3]),.g_up(g[3]),.a(a[15:12]),.b(b[15:12]),.cin(carry[2]));

cla finalcla(.p_up(p_up),.g_up(g_up),.cout(carry),.p(p),.g(g),.cin(cin));

assign co = carry[3];
endmodule

Structural CLA verilog 4bit module with expanded terms

Carry Look Ahead adders are amazing, unfortunately they are a pain to design... here is a module I use quite often.

//cla module 4 bit
module cla(
output p_up, g_up,
output [3:0] cout, // assumed [3:1] was typo becuase it made design less elegant
input [3:0] p, g,
input cin);

//assign p_up = &(p);
and #1 (p_up, p);
wire p3g2, p3p2g1, p3p2p1g0, p3p2p1p0cin;

and #1(p3g2,p[3],g[2]);
and #1(p3p2g1,p[3],p[2],g[1]);
and #1(p3p2p1g0,p[3],p[2],p[1],g[0]);

and #1(p3p2p1p0cin,p[3],p[2],p[1],p[0],cin);

//assign g_up = g[3] | p[3]&g[2] | p[3]&p[2]&g[1] | p[3]&p[2]&p[1]&g[0];
or #1 (g_up,g[3],p3g2,p3p2g1,p3p2p1g0);

//assign cout[3] = g[3] | p[3]&g[2] | p[3]&p[2]&g[1] | p[3]&p[2]&p[1]&g[0] | p[3]&p[2]&p[1]&p[0]&cin;
or #1(cout[3],g[3],p3g2,p3p2g1,p3p2p1g0,p3p2p1p0cin);

wire p2g1,p2p1g0,p2p1p0cin,p1g0,p1p0cin,p0cin;

and #1(p2g1,p[2],g[1]);
and #1(p2p1g0,p[2],p[1],g[0]);
and #1(p2p1p0cin,p[2],p[1],p[0],cin);
and #1(p1g0,p[1],g[0]);
and #1(p1p0cin,p[1],p[0],cin);
and #1(p0cin,p[0],cin);

//assign cout[2] = g[2] | p[2]&g[1] | p[2]&p[1]&g[0] | p[2]&p[1]&p[0]&cin;
or #1(cout[2], g[2],p2g1,p2p1g0,p2p1p0cin);

//assign cout[1] = g[1] | p[1]&g[0] | p[1]&p[0]&cin;
or #1(cout[1],g[1],p1g0,p1p0cin);

//assign cout[0] = g[0] | p[0]&cin;
or #1(cout[0],g[0],p0cin);
endmodule

Structural PFA verilog Partial Full Adder


module pfa(
output p, g, s,
input a, b, cin);
xor #1 sumer(s, a, b, cin);
xor #1 proper(p, a, b);
and #1 gener(g, a, b);
endmodule

3bit counter verilog


module counter(
output [2:0] out,
input clk, rst);
wire [2:0] ns;
counter_code code(ns, out);
dff DFF[2:0](out, ns, clk, rst);
endmodule

// 7,1,6,2,5,3,4,0 start over
module counter_code(
output [2:0] next,
input [2:0] c);
wire [2:0]c_n;
not cnot[2:0] (c_n, c);

// this is where your logic goes for the counter steps
and(n0mid1,c_n[2],c_n[1],c_n[0]);
and(n0mid2,c[2],c[1],c[0]);
and(n0mid3,c_n[2],c[1],c_n[0]);
and(n0mid4,c[2],c_n[1],c[0]);

or(next[0],n0mid1,n0mid2,n0mid3,n0mid4);

nor(n1mid1,c[2],c[1]);
and(n1mid2,c[2],c_n[1],c[0]);
and(n1mid3,c[2],c[1],c_n[0]);

or(next[1],n1mid1,n1mid2,n1mid3);

not(next[2] ,c[2]);
endmodule

Thursday, September 6, 2007

Ruby Capture Key Presses - getc doesn't work

Problem: (doesn't work)
while true
ch = getc #return immediately the key I just pressed (enter, a, down arrow)
puts ch
end

In an almost religious pursuit of ways of capturing keypresses in ruby (for windows) I found a few different technologies that help.

Solution 1 (curses): works! except arrow keys
require 'curses'

#stdscr.keypad(true) # would be great if this was implemented for windows
while true
ch = Curses.getch
puts ch
end

* keypad(true) isn't implemented on windows

Solution 2: Using win32 api
require 'Win32API'

$win32_console_kbhit = Win32API.new("msvcrt", "_kbhit", [], 'I')
$win32_console_cputs = Win32API.new("msvcrt", "_cputs", ['P'], 'I')
$win32_console_getch = Win32API.new("msvcrt", "_getch", [], 'I')

def console_input_ready?
$win32_console_kbhit.call != 0
end

def console_input
$win32_console_getch.call
end

def console_output( str )
$win32_console_cputs.call( str )
end

while true
if console_input_ready? then
ch = console_input
puts "ch: #{ch.chr}"
end
end

And this works for arrow keys so I am happy

Ruby text to speech on windows

Using the win32-sapi ruby can speak!
Install the gem
gem install win32-sapi

Speak some words
require "win32/sapi5"
include Win32
v = SpVoice.new
v.Speak("Shall we play a game?")

*Remember ruby is case sensitive
Other cool features:
v = SpVoice.new
v.ole_get_methods
v.Status
v.Voice
v.Rate
v.Volume
v.Priority

More info: Microsoft Documentation on SpVoice

Wednesday, September 5, 2007

Sick of undefined method * for nil:NilClass

Cool ruby trick to simply your code: if ['href'] == nil then use ""
So undefined method * for nil:NilClass basically means that the method your calling doesn't exist on the Nil class i.e. a NullReferenceException.

a = nil
a.size
=> undefined method * for nil:NilClass

but if you want to assume a default you can use the || operator to fake out ruby

(nil || "") => ""

a = nil
(a || "").size
=> 0


(!a['href'] || "").index('javascript:')

Sweet huh! :-)

Monday, September 3, 2007

Ruby Documentation Library that doesn't suck

Very good organization of ruby documentation, with SEARCH!

http://www.noobkit.com/

1: Search
2: Browsable
3: Can post comments
4: Many corpuses in one spot

Pandora for Facebook = Wonderful

One of the better apps I've seen developed for the Facebook platform. I think this is truly GREAT. All that hard work turning the perfect station, let your friends auto discover it :-)

http://apps.facebook.com/pandora

Practical Programming: Getting Real

A fascinating programming book published by 37signals Getting Real. Basically practical Extreme programming. I think I am going to use this books Table of Contents as a reference when ever I am planning out a project. Great book because:

1: super clear principles
2: just feels right
3: things you already "know" but things you need to hear

Learning Ruby = Programming Ruby Book

Learning ruby or been coding it for years. I dislike programming books, but if your doing anything with ruby. Programming Ruby, by Pragmatic Programmers is a must have; because:

1: The raw amount of cool nifty ruby tricks presented.
2: Reading good code -> to writing better code
3: Great example use of standard libraries
4: 800 pages of expert is currently better then google (this will change)

Putty Numpad doesn't work

Just learned a new trick for putty. Sometimes you press numpad numbers and the program (via ssh) processes these as special characters. If you press Ctrl+Numlock you can manually force putty to use the numpad = numbers.
Ctrl+NumLock = Working Numpad

Auto-mounting Linux Directories through SSH

Automount via SSH

Access your files on any of your machines with auto mounting

cd /mnt/ssh/remote1/
ls
=> yields your files where remote1 can be any remote host

Friday, August 31, 2007

Ruby Disk Based Hash - DBM

I've lost this on google for a year and now I found it! it took 30min of googleing (yes I suck at searching)

require 'dbm'

db = DBM.new('data/test')
db['hello'] = "Justin is really happy he found this"
db['super'] = ":-)"

** data saved to disk directly

db = DBM.new('data/test')
db['hello']
=> "Justin is really happy he found this"


Its pretty fast, at least I'm happy.

Sunday, August 26, 2007

Split Camel Case in Ruby

WikiWords are really common and sometimes a pain for indexers and other user input devices... here is a little ruby script to split them apart.

def unCamel(str)
if str.nil?
return ""
end
str.gsub!(/([A-Z]+|[A-Z][a-z])/) {|x| ' ' + x }
str.gsub!(/[A-Z][a-z]+/) {|x| ' ' + x }
return str
end

unCamel("SettingUpRSSCrazy")
=> " Setting Up RSS Crazy"

unCamel("IReallyHATEWikiWords").split(' ')
=> ["I", "Really", "HATE", "Wiki", "Words"]

Mongrel register_proc

Added a register_proc function to mongrel

require 'mongrel'

class MergeResponse
attr_accessor :out, :head
def initialize(head,out)
@head = head
@out = out
end
end

class ProcHandler < Mongrel::HttpHandler
attr_accessor :block
def process(request, response)
response.start(200) do |head,out|
@block.call(request, MergeResponse.new(head,out))
end
end
end

class Mongrel::HttpServer
def register_proc(str, &proc)
hand = ProcHandler.new
hand.block = proc
self.register(str,hand)
end
end

h = Mongrel::HttpServer.new("0.0.0.0", "3000")
h.register("/files", Mongrel::DirHandler.new("."))
h.register_proc('/justin') {|req, res| res.out.write('smile') }
h.run.join

Sunday, August 19, 2007

RAD Ruby for Microcontroller

Just found an AWESOME project Ruby RAD! I always dreamed of writing all my embedded programs for a microcontroller in ruby instead of C. There is so much highlevel languages can do in the embedded space I just never had time or the skill to implement it.

Demo Video of Ruby for Microcontrollers

class MySketch < ArduinoSketch
output_pin 7, :as => :led
def loop
blink led, 500
end
end

code stolen from an Informative RAD blog post

Ruby's Hash has a default value

FYI: Ruby's Hash object has a default value :-) which just makes code even more elegant

h = Hash.new(0) # default = 0
=> {}
h['justin'] +=10
=> 10

sweet!
or even better:

@index = Hash.new(Hash.new(0))
@index['justin']['cool'] += 20

Ruby Database .... close ruby CDB

I've always want a plain simple ruby database. I've been searching for a lightweight solution to this "desire" I won't even call it a need.

I tried ruby-cdb
http://raa.ruby-lang.org/project/cdb/

basically its a ruby wrapper for access to the "constant Database"
-fast reads
-big data
-good writes

I currently have an error when I try to run it, but I think it was a permissions problem on my linux machine.

undefined method `create' for CDB:Class

Any ideas?

Example Code:

require 'cdb'

CDB.create('cdb', 'tmp', 0600) do |data|
data['eins'] = 'ichi'
data['zwei'] = 'ni'
data['drei'] = 'san'
data['vier'] = 'yon'
end

print CDB.dump('cdb'), "\n"


CDB.update('cdb', 'tmp') do |read, write|
write['one'] = read['eins']
write['two'] = read['zwei']
write['three'] = read['drei']
write['four'] = read['vier']
end

Piping to Ruby

Piping to Ruby to do processing

cat junk.txt | ruby -ne "print $_"

or something cooler

cat junk.txt | ruby -ne "print $_ if $_.size < 20"

Ruby is a programmers swiss army knife.

Saved us from having to either learn regex or write awk :-)

Webrick + Erb = Simple Clean Front End

Use webrick to create a front end for you ruby application. I found embedding ErB (rails like templating) makes ruby ui lightweight and easy.

require 'webrick'
include WEBrick
require 'erb'

s = HTTPServer.new( :Port => 80,:DocumentRoot => Dir::pwd + "/web_docs" )

class SearchServlet < HTTPServlet::AbstractServlet
def do_GET(req, response)
File.open('web_docs/search.rhtml','r') do |f|
@template = ERB.new(f.read)
end
response.body = @template.result(binding)
response['Content-Type'] = "text/html"
end

end
end

s.mount("/search", SearchServlet)

trap("INT"){
s.shutdown
}
s.start

Blog realization

I now first realized why programmers should blog... So that someone else doesn't have to go through the pain you just did :-)

Time for me to bandage the wounds. I'm still bleeding. :-) let the show begin.